What is Signal integrity?
Signal integrity (SI) is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage (or current) waveform. However, digital signals are fundamentally analog in nature, and all signals are subject to effects such as noise, distortion, and loss. Over short distances and at low bit rates, a simple conductor can transmit this with sufficient fidelity. At high bit rates and over longer distances or through various mediums, various effects can degrade the electrical signal to the point where errors occur and the system or device fails. Signal integrity engineering is the task of analyzing and mitigating these effects. It is an important activity at all levels of electronics packaging and assembly, from internal connections of an integrated circuit (IC), through the package, the printed circuit board (PCB), the backplane, and inter-system connections. While there are some common themes at these various levels, there are also practical considerations, in particular the interconnect flight time versus the bit period, that cause substantial differences in the approach to signal integrity for on-chip connections versus chip-to-chip connections.
Some of the main issues of concern for signal integrity are ringing, crosstalk, ground bounce, distortion, signal loss, and power supply noise. To overcome these problems, some techniques used are: Impedance Matching, reducing the number of vias, using differential signaling, controlling the slew rate, and eliminating stubs.
Issue | Description | Mitigation |
---|---|---|
Ringing | Unwanted oscillations caused by impedance mismatches and reflections | Impedance matching, eliminating stubs |
Crosstalk | Undesired coupling between signals | Controlling spacing and routing, using differential pairs |
Ground bounce | Variations in ground reference voltage | Decoupling capacitors, proper grounding and power distribution |
Distortion | Non-linear effects that change the signal shape | Controlling rise/fall times, avoiding overdriving signals |
Signal loss | Attenuation of signal amplitude | Using low-loss materials, impedance matching |
Power supply noise | Variations in supply voltage | Decoupling capacitors, proper power distribution |
Characteristic Impedance
A key concept in signal integrity is characteristic impedance. This is the ratio of the amplitudes of a single pair of voltage and current waves propagating along the line in the absence of reflections. The characteristic impedance of a uniform transmission line, such as a coaxial cable or twisted pair, is equal to the square root of the ratio of the inductance per unit length divided by the capacitance per unit length:
Z0 = √(L/C)
where:
– Z0 is the characteristic impedance in ohms (Ω)
– L is the inductance per unit length in henries per meter (H/m)
– C is the capacitance per unit length in farads per meter (F/m)
For a parallel wire transmission line, an approximation of the characteristic impedance is:
Z0 = 120 ln(2h/d) / √εr
where:
– h is the distance between the centers of the conductors
– d is the diameter of the conductors
– εr is the relative Dielectric constant of the material separating the conductors
It’s important to match the impedances of the source, transmission line, and load to prevent reflections and standing waves which can cause signal integrity issues. When the load impedance is not matched to the characteristic impedance of the transmission line, some of the signal power will be reflected back toward the source. These reflections can cause overshoot, undershoot, and ringing in the signal.
Condition | Result |
---|---|
ZL = Z0 | No reflection, maximum power transfer |
ZL > Z0 | Positive reflection, overshoot |
ZL < Z0 | Negative reflection, undershoot |
ZL = ∞ (open) | Total positive reflection |
ZL = 0 (short) | Total negative reflection |
Controlling Impedance
To ensure good signal integrity, it’s important to control the characteristic impedance of transmission lines. This is done through careful design of the PCB Stackup and trace geometry.
PCB Stackup
The PCB stackup refers to the arrangement of copper and insulating layers in a PCB. The stackup determines the spacing between layers, which affects the impedance. A typical 4-layer stackup might consist of:
- Top layer: Signal
- Inner layer 1: Ground plane
- Inner layer 2: Power plane
- Bottom layer: Signal
The distance between the signal and ground/power planes determines the trace impedance. A thicker dielectric (insulator) will result in higher impedance.
Trace Geometry
The width and thickness of the traces also affect the impedance. Wider traces have lower impedance, while narrower traces have higher impedance. The impedance also depends on the trace thickness and the properties of the dielectric material.
There are several online calculators and PCB design tools that can help determine the right trace width for a given stackup and desired impedance. Here’s an example calculation:
- Dielectric thickness (h) = 5 mils (0.127 mm)
- Dielectric constant (εr) = 4.0
- Desired impedance (Z0) = 50 Ω
- Trace thickness (t) = 1.4 mils (0.0356 mm)
Using these parameters, the required trace width is approximately 9.7 mils (0.246 mm).
Terminations
In addition to controlling the characteristic impedance, it’s also important to properly terminate transmission lines to prevent reflections. There are several types of terminations commonly used:
Series Termination
A series termination consists of a resistor placed near the source, with a value equal to the source impedance minus the trace impedance. This reduces the initial voltage step, slowing down the edge and reducing reflections. However, it also reduces the signal amplitude at the load.
Parallel Termination
A parallel termination consists of a resistor placed at the end of the transmission line, with a value equal to the desired load impedance (usually the same as the characteristic impedance). This absorbs any reflections from the load, preventing them from traveling back to the source. However, it also draws constant current, increasing power consumption.
AC Termination
An AC termination consists of a series resistor and capacitor placed at the end of the transmission line. The resistor value is chosen to match the characteristic impedance, while the capacitor blocks DC current. This provides the benefits of a parallel termination without the increased DC power consumption. However, it’s only effective at high frequencies.
Differential Termination
For differential signaling, where signals are transmitted on two lines with opposite polarity, a differential termination can be used. This consists of a resistor placed between the two lines at the receiver end, with a value equal to the differential impedance. This absorbs any differential-mode reflections while allowing common-mode signals to pass through.
Other Considerations
Vias
Vias are used to connect traces on different layers of a PCB. However, they can also cause impedance discontinuities and reflections. To minimize these effects:
- Use as few vias as possible
- Place vias close to the source or load
- Use smaller vias for high-speed signals
- Avoid unused pads on vias (which can form stubs)
Stubs
Stubs are unterminated branches off a main transmission line. They can cause reflections and ringing, and should be avoided where possible. If stubs are unavoidable, they should be kept as short as possible (less than 1/10 of the wavelength of the highest frequency of interest).
Crosstalk
Crosstalk is the unintended coupling of signals between adjacent traces. It can be reduced by:
- Increasing the spacing between traces
- Running sensitive traces perpendicular to each other
- Using ground traces or planes to shield signals
- Using differential signaling (which cancels out coupling)
Skew
Skew is the difference in arrival times of signals that should arrive simultaneously, such as in a parallel bus. It can be caused by differences in trace lengths or velocities. To minimize skew:
- Keep trace lengths matched
- Route signals in the same layer or adjacent layers
- Use serpentine routing for longer traces to match lengths
FAQ
What is the difference between single-ended and differential signaling?
Single-ended signaling uses one signal trace per bit, referenced to a common ground. Differential signaling uses two traces per bit, with opposite polarities. Differential signaling is more immune to noise and crosstalk, but requires more traces and pins.
What is the difference between microstrip and stripline traces?
Microstrip traces run on the outer layers of a PCB, with a ground plane underneath. Stripline traces run in the inner layers, with ground planes above and below. Stripline has better shielding and lower radiation, but requires a thicker PCB.
What is the propagation delay of a trace?
The propagation delay is the time it takes for a signal to travel from one end of a trace to the other. It depends on the length of the trace and the speed of the signal, which in turn depends on the dielectric constant of the PCB material. A typical value is around 150-200 ps/inch for FR-4 material.
What is the difference between rise time and fall time?
Rise time is the time it takes for a signal to go from low to high, while fall time is the time it takes to go from high to low. They are usually measured between the 10% and 90% points. Faster rise and fall times can improve timing margins, but can also cause more reflections and EMI.
What is a ground bounce?
Ground bounce is a variation in the ground reference voltage due to current flowing through the ground impedance. It can be caused by multiple outputs switching simultaneously, especially in high-current devices like FPGAs. It can be mitigated by using dedicated ground planes, decoupling capacitors, and slew rate control.
No responses yet